• This invention proposes a super cooling method for significant reduction of both average temperature and temperature oscillation in power electronics devices.
• In comparison with traditional power electronics, the super cooling device is able to reduce the temperature oscillation of the power electronic chip by 70 % while the average temperature is kept at ambient environment temperature.
• The present invention provides a method of minimizing thermal stress of a semiconductor chip or enhancing current density through an existing power electronic module.
• The proposed technology moves the high temperature zone from the semiconductor to the heat sink, by immediate response to current variations, giving much reduced cooling system footprint as well as wider operational window of power electronics.
• The micro-structured heat sink together with thin film cooling elements open a new window for hybrid power electronics modules, operating as independent power electronic systems, and enhances system design flexibility by creating independent island-like modules.
• This technology is most suitable for high temperature applications, so that the chip is able to operate close to the coolant fluid temperature (e.g. oil) and low temperature semiconductors (Si) can be used instead of high temperature semiconductors (SiC) .
•Since the temperature oscillation of the semiconductor and its solder layer drops, the thermal stress reduces and life time of the power electronic modules enhances significantly.
•This technology can be utilized in high density power electronics industries, such as wind turbine, electric car, train, digging machine, light emitting diodes, laser, etc.
• The method comprises the steps of establishing a periodic super cooling pulse matched with device modular frequency by a thermoelectric cooling device thermally connected to the semiconductor chip.
• The super cooling period partly overlaps the temperature increasing period, and the recovery period of the cooling period partly overlaps the temperature decreasing period, in the semiconductor chip, thereby peak shaving at both high and low temperatures.
• The super cooling current, imposed into the thermoelectric cooler, includes optimal values of base current, pulse magnitude, pulsing period, and time when the pulse is enforced
Current State of Development
Significant amount of simulations, both in fundamental level and 3D calculation environment, are considered. Proof of concept has been achieved in an initial design prototype, and the simulations show good agreement with the experimental validation. The manufacturing process of efficient super and smart cooling technology is documented.
Lars Halkjær, Technology Transfer Manager, email: email@example.com